Four device SRAM cell with single bitline
作者： Kevin Arthur Batson , Robert Anthony Ross
DOI:
关键词: CMOS 、 Sense amplifier 、 Voltage 、 Node (circuits) 、 Memory cell 、 Computer hardware 、 Line (electrical engineering) 、 Computer science 、 Signal 、 Transistor
摘要: A memory cell includes a static inverter having an input connected to storage node. An impedance connects the node voltage supply. first transistor, output of inverter, write line. Lastly, second responsive wordline access signal, single data bitline. The further ended four transistor CMOS SRAM cell. Additionally, array is disclosed which plurality cells arranged form matrix rows and columns, each including
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