SEMICONDUCTOR MEMORY CELL CIRCUIT

作者: Mikami Masahiro

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摘要: PURPOSE:To reduce the area of a memory array by supplying electric power source multistable circuit via word lines making absolute value threshold voltage selecting transistor greater than that transistor. CONSTITUTION:The cell is an NMOS static memory. To write data, bit line 16 held at high V4, 17 low V0. As 15 increased up to transistors 19 and 22 both turn on, node 24 V0, 25 turns off. Therefore, potential 23 becomes equal obtained subtracting V3 from V4 15, since it V1, 26 so operation will be considered completed. This consists four two load resistances while number wires 3.5, which 0.5 less conventional cell. The reduced 7%.

参考文章(2)
Takagi Shigeru, 44TRANSISTOR STATIC MEMORY CELL ,(1978)