作者: Sudha Sarma , Adalberto Guillermo Yanes
DOI:
关键词: Memory map 、 Computer memory 、 Memory management 、 Memory address 、 Memory refresh 、 Computer architecture 、 Interleaved memory 、 Registered memory 、 Computer hardware 、 Flat memory model 、 Computer science
摘要: A memory controller design includes at least one instruction decoder de-embedded from a processor wherein the receives operations and logical address information host processor. The converts into generic instructions translates addresses physical addresses. further specific control signals actual This permits to be designed finalized before an type is selected for system use which time less complex can designed.