System and Method for Adjusting a Characteristic of A Periodic Signal with Use of a Filtered Bias Voltage
作者： Rafal Karakiewicz , Antonios Pialis , Navid Yaghini , Robert Wang , Rajeevan Mahadevan
DOI:
关键词:
摘要: Circuits and methods for controlling a VCO output signal. A filtered version of an integral path input signal controls current flow through proportional path. An exemplary embodiment generates from digital to analog converter. First circuitry includes first transistor device low pass filter which provides the control conduction device, providing frequency adjustment Proportional switching between supply terminal second receives signals provide phase relative reference
lens.org 参考文章(16)
Bertrand Jeffrey Williams, Phase locked loop having integration gain reduction ,(1995)
Ling-Wei Ke, Tser-Yu Lin, Tai-Yuan Yu, Hsin-Hung Chen, Signal generating apparatus and method thereof ,(2007)
Antonios Pialis, Navid Yaghini, Mark Andruchow, Robert Wang, Zhuobin Li, Rajeevan Mahadevan, Nicola Pantaleo, Sida Shen, Raymond Kwok Kei Tang, Mike Bichan, Rafal Karakiewicz, System Including Circuitry For Controlling A Characteristic of a Periodic Signal and Method for Adjusting a Signal ,(2012)
Alok Kumar Gupta, Phase locked loop for an OFDM system ,(2004)
Melvin L. Hagge, Baker Scott, Adrian Maxim, Edmund M. Schneider, Low-jitter loop filter for a phase-locked loop system ,(2003)
Jeremy D. Dunworth, Bhushan S. Asuri, Gary J. Ballantyne, Configurable digital-analog phase locked loop ,(2009)
Shoujun Wang, Tad Kwasniewski, Haitao Mei, Bill Bereza, Clock data recovery loop with separate proportional path ,(2005)
Anwar Sadat, John Thomas Wilson, Richard Ellis Jennings, Dual path phase locked loop (PLL) with digitally programmable damping ,(2008)
Cheng-Ta Wei, Ming-Shih Yu, Clock and data recovery circuit with proportional path ,(2010)
Jonathan E. Rogers, Kenneth W. Martin, Mehrdad Ramezani, Tony Pialis, Serializer deserializer circuits ,(2007)