Efficient region coherence protocol for clustered shared-memory multiprocessor systems

摘要: A system and method of a region coherence protocol for use in Region Coherence Arrays (RCAs) deployed clustered shared-memory multiprocessor systems which optimize cache-to-cache transfers by allowing broadcast memory requests to be provided only portion system. Interconnect hierarchy levels can devised logical groups processors, processors on the same chip, chips aggregated into multichip module, modules printed circuit board, other boards or cabinets. The present includes, example, one bit per level interconnect hierarchy, such that has value “1” indicate there may caching copies lines from at “0” are no cached any respective hierarchy.