Device component forming method with a trim step prior to sidewall image transfer (SIT) processing

作者: Qiqing C. Ouyang , Charles W. Koburger , Toshiharu Furukawa , David V. Horak

DOI:

关键词:

摘要: Disclosed herein is an imaging method for patterning component shapes (e.g., fins, gate electrodes, etc.) into a substrate. By conducting trim step prior to performing either additive or subtractive sidewall image transfer process, the avoids formation of loop pattern in hard mask and, thus, post-SIT process requiring alignment sub-lithographic features form with discrete segments. In one embodiment trimmed SIT so that not formed. another oxide layer and memory are used mandrel process. A then protect portions during etch back

参考文章(12)
David M. Fried, Jeffrey S. Brown, Edward J. Nowak, Beth Ann Rainey, DRAM cell with enhanced SER immunity ,(2002)
David M Fried, Devendra K Sadana, Edward J Nowak, Beth Ann Rainey, Fin fet devices from bulk semiconductor and method for forming ,(2003)
Brent A. Anderson, Edward J. Nowak, Bethann Rainey, Method of forming freestanding semiconductor layer ,(2004)
Mark Charles Hakey, Steven John Holmes, Charles William Koburger, Peter H. Mitchell, Toshiharu Furukawa, David Vaclav Horak, Method for forming quadruple density sidewall image transfer (SIT) structures ,(2004)
Douglas C. La Tulipe, Kaushik A. Kumar, Andrew H. Simon, Steffen K. Kaldor, Lawrence A. Clevenger, Timothy J. Dalton, Mark Hoinkis, Stephen M. Rossnagel, Andrew P. Cowley, Crystallographic Modification of Hard mask Properties ,(2003)
Paolo Caprara, Sergio Cereda, Rustom Irani, Claudio Brambilla, Pierantonio Pozzoni, Process for manufacturing semiconductor integrated memory devices with cells matrix having virtual ground ,(2000)
Dale W. Martin, Edward W. Conrad, Chung H. Lam, Edmund Sprogis, Self-aligned contact areas for sidewall image transfer formed conductors ,(2003)