作者: Bruce P. McKenney
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摘要: A computerized method and apparatus transfers data between source destination memories using a programmed input/output loop executing on central processing unit which controls cache memory to perform the transfer. Blocks of are mapped respective memories, preferably I/O associated with devices. Cache done bursting allows multiple units be returned in response single request for data. To transfer data, block is cleared read into via bursting. then written cache. Finally, flushed out memory. The clearing blocks may concurrently reading writing blocks. Through use bursting, overall throughput rates can exceed DMA configured similar Bursting provides minimal system bus overhead. Preferred embodiments implemented Motorola MPC860 PowerPC microprocessor.