Stacked silicon-germanium nanowire structure and method of forming the same

作者: Guo Qiang Lo , Navab Singh , Lakshmi Kanta Bera , Hoai Son Nguyen

DOI:

关键词:

摘要: A method of forming a stacked silicon-germanium nanowire structure on support substrate is disclosed. The includes the substrate, comprising at least one channel layer and interchannel deposited layer; fin from structure, two supporting portions portion arranged there between; oxidizing thereby being surrounded by oxide; removing oxide to form nanowire. gate-all-around transistor that has been formed also are

参考文章(10)
Sung-min Kim, Eun-Jung Yun, Sung-young Lee, Methods of forming a multi-bridge-channel MOSFET ,(2005)
W. W. Fang, N. Singh, L. K. Bera, H. S. Nguyen, S. C. Rustagi, G. Q. Lo, N. Balasubramanian, D.-L. Kwong, Vertically Stacked SiGe Nanowire Array Channel CMOS Transistors IEEE Electron Device Letters. ,vol. 28, pp. 211- 213 ,(2007) , 10.1109/LED.2007.891268
Lincoln J. Lauhon, Mark S. Gudiksen, Deli Wang, Charles M. Lieber, Epitaxial core–shell and core–multishell nanowire heterostructures Nature. ,vol. 420, pp. 57- 61 ,(2002) , 10.1038/NATURE01141
Jie Xiang, Wei Lu, Yongjie Hu, Yue Wu, Hao Yan, Charles M. Lieber, Ge/Si nanowire heterostructures as high-performance field-effect transistors Nature. ,vol. 441, pp. 489- 493 ,(2006) , 10.1038/NATURE04796
Tsung-Yang Liow, Kian-Ming Tan, Yee-Chia Yeo, Ajay Agarwal, Anyan Du, Chih-Hang Tung, Narayanan Balasubramanian, Investigation of silicon-germanium fins fabricated using germanium condensation on vertical compliant structures Applied Physics Letters. ,vol. 87, pp. 262104- ,(2005) , 10.1063/1.2151257
N. Singh, A. Agarwal, L.K. Bera, T.Y. Liow, R. Yang, S.C. Rustagi, C.H. Tung, R. Kumar, G.Q. Lo, N. Balasubramanian, D.-L. Kwong, High-performance fully depleted silicon nanowire (diameter /spl les/ 5 nm) gate-all-around CMOS devices IEEE Electron Device Letters. ,vol. 27, pp. 383- 386 ,(2006) , 10.1109/LED.2006.873381