Hybrid cmos nanowire mesh device and finfet device

作者: Josephine B. Chang , Chung-Hsun Lin , Leland Chang , Jeffrey W. Sleight

DOI:

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摘要: A method of forming a hybrid semiconductor structure on an SOI substrate. The includes integrated process flow to form nanowire mesh device and FINFET the same Also included is which

参考文章(29)
Guo Qiang Lo, Navab Singh, Lakshmi Kanta Bera, Hoai Son Nguyen, Stacked silicon-germanium nanowire structure and method of forming the same ,(2006)
Robert S. Chau, Been-Yih Jin, Matthew V. Metz, Marko Radosavlievic, Jack T. Kavalieros, Fabrication of germanium nanowire transistors ,(2010)
Sarunya Bangsaruntip, Jeffrey W. Sleight, Leland Chang, Josephine B. Chang, Nanowire FET and FINFET Hybrid Technology ,(2011)
Jeffrey W. Sleight, Michael A. Guillorn, Paul Chang, Josephine B. Chang, Nanowire Mesh FET with Multiple Threshold Voltages ,(2009)
Katherine Lynn Saenger, Michael Guillorn, Wilfried Ernst-August Haensch, Josephine Bea Chang, Fin field effect transistor devices with self-aligned source and drain regions ,(2009)
Jeffrey P. Gambino, Jed H. Rankin, Jerome B. Lasky, Fin field effect transistor with self-aligned gate ,(2001)
Mark L. Doczy, Justin K. Brask, Brian S. Doyle, Robert S. Chau, Uday Shah, Suman Datta, Jack T. Kavalieros, Matthew V. Metz, Process for integrating planar and non-planar cmos transistors on a bulk substrate and article made thereby ,(2006)
Chen-Hua Yu, Chen-Nan Yeh, Cheng-Hung Chang, FinFETs having dielectric punch-through stoppers ,(2008)
Meikei Ieong, Bruce B. Doris, Thomas S. Kanarsky, Min Yang, Diane C. Boyd, Jakub T. Kedzierski, Hybrid planar and FinFET CMOS devices ,(2005)