Multi-threaded DMA
作者： Franck Seigneret , Praveen Kolli , Sivayya Ayinala , Prabha Atluri , Nabil Khalifa
DOI:
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摘要: A direct memory access (DMA) circuit ( 200 ) includes a read port 202 and write 204 ). The DMA is multithreaded initiator with “m” threads on the “n” two decoupled contexts schedulers 302, 304 that provide for more efficient buffering pipelining. are mainly arbitrating between channels at thread boundary. One associated to one service where can be single or burst transaction. transfer allows concurrent channel transfers.
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