作者: J. Vital , A. Marques , P. Azevedo , J. Franca
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摘要: This paper addresses design considerations for high-speed moderate-to-high resolution current-steering digital-to-analogue converters (DACs) in CMOS technology. A example of a 12b 200MHz DAC 0.35μm digital technology is used to illustrate the techniques, which are then validated through experimental results obtained from integrated prototypes. Additionally, some techniques render layout this easily retargetable also explained.