作者: Larry E. Marcanti , Herman Kwong , Aneta D. Wyrzykowska
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摘要: A technique for eliminating electrically conductive vias is disclosed. In one embodiment, the realized as an improved multilayer circuit board vias. The has a top layer and buried separated by at least dielectric layer, wherein includes power plane portion ground portion. improvement comprises cavity in extending through so to expose of within cavity. sized accommodate electronic component therein such that makes electrical contact with exposed thereby need connected layer.