Method and circuit for configuring memory core integrated circuit dies with memory interface integrated circuit dies

作者: Suresh N. Rajan

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摘要: A memory device comprises a first and second integrated circuit dies. The die core as well interface circuit. permits full access to the cells (e.g., reading, writing, activating, pre-charging refreshing operations cells). that interfaces core, via circuit, an external bus, such synchronous bus. technique combines dies with configure device. speed test on is conducted, electrically coupled based of die.

参考文章(255)
David T. Wang, Keith R. Schakel, Michael John Sebastian Smith, Frederick Daniel Weber, Suresh Natarajan Rajan, System and method for simulating an aspect of a memory circuit ,(2007)
David Jeffrey, Clement Fang, Tayung Wong, John Carrillo, Nikhil Vaidya, Nagaraj Mitty, Jay Robinson, Memory expansion module with stacked memory packages and a serial storage unit ,(1999)
Mark W. Kellogg, Bruce G. Hazelzet, Brian J. Connolly, High density memory modules with improved data bus performance ,(1996)
Maksim Kuzmenka, Hermann Ruckerbauer, Andreas Jakobs, Semiconductor memory module ,(2004)
Reuven Elhamias, Kevin M. Conley, Flash controller cache architecture ,(2005)
Tsukasa Ooishi, Takaharu Tsuji, Hideto Hidaka, Hiroshi Kato, Masatoshi Ishikawa, Semiconductor device with reduced current consumption in standby state ,(2003)
Robert S. Pauley, Jayesh R. Bhakta, Arrangement of integrated circuits in a memory module ,(2004)