作者: Sr. David L. Taylor
DOI:
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摘要: A new ensemble of logic elements organized in an array and a method forming the same wherein architecture includes main field transistor formed on substrate material. group load transistors gates are located within transistors. At least one routing channel is provided field, input/output structure substrate. region flip-flop elements, also may be provided. Preferably, plurality such groups, arrays regions parallel strips extending across perpendicular bussing extends to divide into component arrays. The configurable structures or dedicated inverters, employed. electrical interconnection these terms form integrated circuit.