Cu via process optimization by electro-migration estimation testing

摘要: For Cu interconnects technology, the effects of barrier thickness and process optimizations are very important to electro-migration (EM) reliability. The microstructure electrochemical plating is highly with respect characteristic underlying seed layers. Non-enough thickness, we found early failure in single via test structure degrading EM lifetime. Furthermore, significant occur void formation site induce poor lifetime from non-optimized deposition process. We conducted failures analyses studied root causes. From investigation results, both generation mechanism reported.