Customized shield plate for a field effect transistor
作者： Agni Mitra , David C. Burdeaux
DOI:
关键词:
摘要: A customized shield plate field effect transistor (FET) includes a semiconductor layer, gate dielectric, electrode, and at least one plate. The conductive layer overlying portion of the electrode sidewalls, substrate adjacent to sidewall. defines edge its lateral boundary. distance between sidewall varies along length may form triangular, curved, other shaped elements. configuration reduce area resulting capacitor thereby achieve lower parasitic capacitance associated with FET. FET be implemented as diffused MOS (LDMOS) suitable for high power radio frequency applications.
lens.org 参考文章(19)
Gary Eugene Daum, Haian Lin, Simon John Molloy, Christopher Boguslaw Kocon, Charles Walter Pearce, John Manning Savidge Neilson, High voltage channel diode ,(2010)
Shuming Xu, Jacek Korec, Power LDMOS transistor ,(2005)
Daniel Ng, Francois Hebert, MOSFET having buried shield plate for reduced gate/drain capacitance ,(1997)
James Cheng-Min Hwang, Marvin Nii Nartey Marbell, Adaptive bias technique for field effect transistor ,(2007)
Benoit Dufort, Theodore Letavic, John Petruzzello, SOI-LDMOS device with integral voltage sense electrodes ,(2002)
Kyle Terrill, Transistor structure with feed-through source-to-substrate contact ,(2015)
Robert Bruce Davies, Transistor structure having dual shield layers ,(2008)
Johan Darmawan, John Mason, Jeff Babcock, LDMOS transistor having gate shield and trench source capacitor ,(2004)
Johan Agus Darmawan, John Mason, Ly Diep, Jeff Babcock, LDMOS transistor with improved gate shield ,(2004)