Detection of an antenna effect in VLSI designs

作者: W. Maly , C. Ouyang , S. Ghosh , S. Maturi

DOI: 10.1109/DFTVS.1996.571999

关键词:

摘要: This paper describes an extraction methodology capable of detecting "antenna" condition in VLSI designs. Proposed can handle large size designs using standard design rule checking and circuit procedures. Examples application the proposed method on industrial IC show that occurrence antenna effect may be uncontrolled by-product environment.

参考文章(7)
K. P. Wang, Layout design for yield and reliability 5th ACM SIGDA Physical Design Workshop. ,(1996)
H. Shin, C. King, C. Hu, Thin oxide damage by plasma etching and ashing processes international reliability physics symposium. pp. 37- 41 ,(1992) , 10.1109/RELPHY.1992.187618
S. Fang, J.P. McVittie, Thin-oxide damage from gate charging during plasma processing IEEE Electron Device Letters. ,vol. 13, pp. 288- 290 ,(1992) , 10.1109/55.145056
W. Maly, M. Patyra, A. Primatic, V. Raghavan, T. Storey, A. Wolfe, Memory chip for 24-port global register file custom integrated circuits conference. ,(1991) , 10.1109/CICC.1991.164130
H.T. Heineken, W. Maly, Manufacturability analysis environment-MAPEX custom integrated circuits conference. pp. 309- 312 ,(1994) , 10.1109/CICC.1994.379712
James P. McVittie, Calvin T. Gabriel, How plasma etching damages thin gate oxides Solid State Technology. ,vol. 35, pp. 81- 88 ,(1992)
Chenming Hu, Hyungcheol Shin, Neeta Jha, Graham W. Hills, Qian Xue-Yu, Plasma etching charge-up damage to thin oxides Solid State Technology. ,vol. 36, pp. 29- 35 ,(1993)