Modeling of Quantum Confinement and Capacitance in III–V Gate-All-Around 1-D Transistors
作者： Mohit D. Ganeriwala , Chandan Yadav , Francisco G. Ruiz , Enrique G. Marin , Yogesh Singh Chauhan
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摘要: In this paper, a physics-based compact model for calculating the semiconductor charges and gate capacitance of III–V nanowire (NW) MOS transistors is presented. The calculates subband energies by considering wave function penetration into insulator, effective mass discontinuity at semiconductor–oxide interface, 2-D confinement in NW, Fermi–Dirac statistics. charge expression proposed paper completely explicit terms applied voltage, therefore, making it highly suitable large circuit simulations. also compared with results from self-consistent Schrodinger–Poisson solver different NW sizes materials found to be accurate over wide range voltages.
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sci-hub.se 参考文章(32)
Mohan Vamsi Dunga, Chung-Hsun Lin, Ali M. Niknejad, Chenming Hu, BSIM-CMG: A Compact Model for Multi-Gate Transistors Springer, Boston, MA. pp. 113- 153 ,(2008) , 10.1007/978-0-387-71752-4_3
Raseong Kim, Xufeng Wang, Mark Lundstrom, Notes on Fermi-Dirac Integrals arXiv: Mesoscale and Nanoscale Physics. ,(2008)
Chandan Yadav, Juan Pablo Duarte, Sourabh Khandelwal, Amit Agarwal, Chenming Hu, Yogesh Singh Chauhan, Capacitance Modeling in III–V FinFETs IEEE Transactions on Electron Devices. ,vol. 62, pp. 3892- 3897 ,(2015) , 10.1109/TED.2015.2480380
S. Natarajan, M. Agostinelli, S. Akbar, M. Bost, A. Bowonder, V. Chikarmane, S. Chouksey, A. Dasgupta, K. Fischer, Q. Fu, T. Ghani, M. Giles, S. Govindaraju, R. Grover, W. Han, D. Hanken, E. Haralson, M. Haran, M. Heckscher, R. Heussner, P. Jain, R. James, R. Jhaveri, I. Jin, H. Kam, E. Karl, C. Kenyon, M. Liu, Y. Luo, R. Mehandru, S. Morarka, L. Neiberg, P. Packan, A. Paliwal, C. Parker, P. Patel, R. Patel, C. Pelto, L. Pipes, P. Plekhanov, M. Prince, S. Rajamani, J. Sandford, B. Sell, S. Sivakumar, P. Smith, B. Song, K. Tone, T. Troeger, J. Wiedemer, M. Yang, K. Zhang, A 14nm logic technology featuring 2nd-generation FinFET, air-gapped interconnects, self-aligned double patterning and a 0.0588 µm2 SRAM cell size 2014 IEEE International Electron Devices Meeting. ,(2014) , 10.1109/IEDM.2014.7046976
P. Van Halen, D. L. Pulfrey, Accurate, short series approximations to Fermi–Dirac integrals of order −1/2, 1/2, 1, 3/2, 2, 5/2, 3, and 7/2 Journal of Applied Physics. ,vol. 57, pp. 5271- 5274 ,(1985) , 10.1063/1.335269
Sriramkumar Venugopalan, Muhammed A. Karim, Sayeef Salahuddin, Ali M. Niknejad, Chenming Calvin Hu, Phenomenological Compact Model for QM Charge Centroid in Multigate FETs IEEE Transactions on Electron Devices. ,vol. 60, pp. 1480- 1484 ,(2013) , 10.1109/TED.2013.2245419
Jesús A. del Alamo, Nanometre-scale electronics with III–V compound semiconductors Nature. ,vol. 479, pp. 317- 323 ,(2011) , 10.1038/NATURE10677
X. Aymerich‐Humet, F. Serra‐Mestres, J. Millán, A generalized approximation of the Fermi–Dirac integrals Journal of Applied Physics. ,vol. 54, pp. 2850- 2851 ,(1983) , 10.1063/1.332276
J. Robertson, B. Falabretti, Band offsets of high K gate oxides on III-V semiconductors Journal of Applied Physics. ,vol. 100, pp. 014111- ,(2006) , 10.1063/1.2213170
EG Marin, FG Ruiz, IM Tienda-Luna, A Godoy, P Sánchez-Moreno, F Gámiz, None, Analytic potential and charge model for III-V surrounding gate metal-oxide-semiconductor field-effect transistors Journal of Applied Physics. ,vol. 112, pp. 084512- ,(2012) , 10.1063/1.4759275