作者: H.J. Joo , Y.J. Song , H.H. Kim , S.K. Kang , J.H. Park
DOI: 10.1109/VLSIT.2004.1345445
关键词:
摘要: We developed FRAM embedded smartcard in which replace EEPROM and SRAM to improve the read/write cycle time endurance of data memories smartcard. Highly reliable sensing window for was achieved by advanced integration technologies such as novel capacitor technology, multi-level encapsulating barrier layer (EBL) optimal inter-metallic dielectrics (IMD) technology.