Using Address Independent Seed Encryption and Bonsai Merkle Trees to Make Secure Processors OS- and Performance-Friendly

作者: Brian Rogers , Siddhartha Chhabra , Milos Prvulovic , Yan Solihin

DOI: 10.1109/MICRO.2007.44

关键词:

摘要: … However this solution also impacts performance since a memory access now must fetch the block’s counter and LPID in addition to the data, thus increasing bandwidth usage. …

参考文章(21)
R. Canetti, H. Krawczyk, M. Bellare, HMAC: Keyed-Hashing for Message Authentication RFC. ,vol. 2104, pp. 1- 11 ,(1997)
A. Huang, The trusted PC: skin-deep security IEEE Computer. ,vol. 35, pp. 103- 105 ,(2002) , 10.1109/MC.2002.1039525
Mrinmoy Ghosh, Chenghuai Lu, Hsien-Hsin S. Lee, Weidong Shi, Architectural Support for High Speed Protection of Memory Integrity and Confidentiality in Multiprocessor Systems international conference on parallel architectures and compilation techniques. pp. 123- 134 ,(2004) , 10.5555/1025127.1026002
G. Edward Suh, Dwaine Clarke, Blaise Gassend, Marten van Dijk, Srinivas Devadas, AEGIS: architecture for tamper-evident and tamper-resistant processing international conference on supercomputing. pp. 357- 368 ,(2003) , 10.1145/2591635.2667184
Taeho Kgil, Laura Falk, Trevor Mudge, ChipLock ACM SIGARCH Computer Architecture News. ,vol. 33, pp. 134- 143 ,(2005) , 10.1145/1055626.1055644
Youtao Zhang, Lan Gao, Jun Yang, Xiangyu Zhang, R. Gupta, SENSS: security enhancement to symmetric shared memory multiprocessors high-performance computer architecture. pp. 352- 362 ,(2005) , 10.1109/HPCA.2005.31
Dan Boneh, Patrick Lincoln, Mark Horowitz, John Mitchell, Mark Mitchell, David Lie Chandramohan Thekkath, Architectural support for copy and tamper-resistant software ,(2003)
Weidong Shi, Hsien-Hsin S. Lee, Authentication Control Point and Its Implications For Secure Processor Design international symposium on microarchitecture. pp. 103- 112 ,(2006) , 10.1109/MICRO.2006.11
Brian Rogers, Milos Prvulovic, Yan Solihin, Efficient data protection for distributed shared memory multiprocessors international conference on parallel architectures and compilation techniques. pp. 84- 94 ,(2006) , 10.1145/1152154.1152170