Parasitic resistance in an MOS transistor used as on-chip decoupling capacitance
作者： P. Larsson
DOI: 10.1109/4.563679
关键词:
摘要: … is important to consider when decoupling high-speed circuits [7]. … in MOS transistors used as on-chip decoupling capacitance. … be kept low by proper design of the decoupling capacitor. …
harvard.edu
sci-hub.se 参考文章(11)
John R. Whinnery, Theodore Van Duzer, Simon Ramo, Fields and Waves in Communication Electronics ,(1966)
H. B. Bakoglu, Circuits, interconnections, and packaging for VLSI ,(1990)
T.J. Cabara, W.C. Fischer, J. Harrington, W.W. Troutman, Forming damped LRC parasitic circuits in simultaneously switched CMOS output buffers IEEE Journal of Solid-state Circuits. ,vol. 32, pp. 407- 418 ,(1997) , 10.1109/4.557639
R. Allmon, B. Benschneider, M. Callander, L. Chao, D. Dever, J. Farrell, N. Fitzgerald, J. Grodstein, S. Hassoun, L. Hudepohl, D. Kravitz, J. Lundberg, R. Marcello, S. Marino, J. Pickholtz, R. Preston, M. Richesson, S. Samudrala, D. Sanders, System, process, and design implications of a reduced supply voltage microprocessor international solid-state circuits conference. pp. 48- 49 ,(1990) , 10.1109/ISSCC.1990.110123
R. Senthinathan, J.L. Prince, Application specific CMOS output driver circuit design techniques to reduce simultaneous switching noise IEEE Journal of Solid-state Circuits. ,vol. 28, pp. 1383- 1388 ,(1993) , 10.1109/4.262016
Daniel W Dobberpuhl, Richard T Witek, Randy Allmon, Robert Anglin, David Bertucci, Sharon Britton, Linda Chao, Robert A Conrad, Daniel E Dever, Bruce Gieseke, Soha MN Hassoun, Gregory W Hoeppner, Kathryn Kuchler, Maureen Ladd, Burton M Leary, Liam Madden, Edward J McLellan, Derrick R Meyer, James Montanaro, Donald A Priore, Vidya Rajagopalan, Sridhar Samudrala, Sribalan Santhanam, A 200-MHz 64-b dual-issue CMOS microprocessor international solid-state circuits conference. ,vol. 27, pp. 1555- 1567 ,(1992) , 10.1109/4.165336
R. Evans, M. Tsuk, Modeling and measurement of a high-performance computer power distribution system IEEE Transactions on Components, Packaging, and Manufacturing Technology: Part B. ,vol. 17, pp. 467- 471 ,(1994) , 10.1109/96.338710
E. Chioffi, F. Maloberti, G. Marchesi, G. Torelli, High-speed, low-switching noise CMOS memory data output buffer IEEE Journal of Solid-state Circuits. ,vol. 29, pp. 1359- 1365 ,(1994) , 10.1109/4.328637
B. Razavi, Ran-Hong Yan, K.F. Lee, Impact of distributed gate resistance on the performance of MOS devices IEEE Transactions on Circuits and Systems I-regular Papers. ,vol. 41, pp. 750- 754 ,(1994) , 10.1109/81.331530
H. Hashemi, P.A. Sandborn, D. Disko, R. Evans, The close attached capacitor: a solution to switching noise problems electronic components and technology conference. ,vol. 15, pp. 1056- 1063 ,(1992) , 10.1109/ECTC.1992.204261