Dual-port semiconductor memory and first in first out (FIFO) memory having electrically floating body transistor
作者： Yuniarto Widjaja
DOI:
关键词:
摘要: Multi-port semiconductor memory cells including a common floating body region configured to be charged level indicative of state the cell. The multi-port include plurality gates and conductive regions interfacing with said region. Arrays method operating arrays are disclosed for making device.
google.com.ly 参考文章(217)
Riichiro Shirota, Semiconductor memory device with a memory cell array formed on a semiconductor substrate ,(2005)
Gerald S. Holzhammer, Non-volatile disk cache ,(1994)
Richard T. Simko, Nonvolatile static random access memory devices ,(1979)
Richard T. Simko, Single-transistor cell EEPROM array for analog or digital storage ,(1992)
Daniel Robert Shepard, Unified switch array for memory devices ,(2011)
Giovanni Campardo, Rino Micheloni, David Novosel, VLSI-design of non-volatile memories ,(2005)
Yuniarto Widjaja, Benjamin S. Louie, Jin-Woo Han, Content addressable memory device having electrically floating body transistor ,(2014)
Ichiro Fujiwara, Yutaka Hayashi, Nonvolatile semiconductor memory device and writing and erasing method of the same ,(1998)
Yuniarto Widjaja, Benjamin S. Louie, Zvi Or-Bach, Scalable floating body memory cell for memory compilers and method of using floating body memories with memory compilers ,(2014)