Metallurgy for copper plated wafers

摘要: Improved protective metallization arrangements are described that particularly useful in bumped copper-top type semiconductor chips. In one aspect of the invention, device includes integrated circuits and has a top wafer fabrication passivation layer. A plurality I/O pads exposed through contact pad openings formed patterned copper layer is over The electrically coupled to openings. metallic barrier provided between titanium overlies at least portions preferably cooperates with envelop regions pads. first aluminum An insulating from an organic material Underbump stacks Each underbump stack connected its associated opening Solder bumps then adhered stacks.