作者: Nikhil V. Kelkar
DOI:
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摘要: An improved under bump structure for use in semiconductor devices is described. The includes a passivation layer having plurality of vias. vias are positioned such that associated with (i.e., located over) each contact pad. A metal fills the and forms metallization pad suitable supporting solder bump. Preferably extends over at least portions to form unified Each electrically connected through described structures can be formed wafer level.