作者: Sangheon Lee , Jeonghwan Song , Daeseok Lee , Jiyong Woo , Euijun Cha
DOI: 10.1016/J.SSE.2014.11.013
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摘要: Abstract The effect of AC pulse engineering on the nonlinearity and reliability selectorless resistive random access memory was investigated in order to implement a high-density cross-point array. Applying an bias can induce current overshoot during switching, owing parasitic capacitance resistance measuring equipment. We observed that dependent set pulse, whereas programming/erasing endurance determined by reset pulse. is very sensitive conditions, it degrades device performance reliability. Therefore, shape engineered eliminate resulting from factors achieve reliable memory.