Membrane 3D IC fabrication

作者: Glenn Joseph Leedy

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摘要: General purpose methods for the fabrication of 5 integrated circuits from flexible membranes formed very thin low stress dielectric materials, such as silicon dioxide or nitride, and semiconductor layers. Semiconductor devices are in a layer membrane. The membrane is initially forced substrate standard thickness, all but surface then etched polished away. In another version, used support electrical interconnect conventional circuit die bonded thereto, with multiple layers Multiple can be connected to one membrane, which packaged multi-chip module. Other applications based on (circuit) processing bipolar MOSFET transistor fabrication, impedance conductor interconnecting flat panel displays, maskless (direct write) lithography, 3D 1C fabrication.

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