Cache storage line shareability control for a multiprocessor system

摘要: A multiprocessor (MP) system is described having central processors (CPs) in which each CP has a store-in-cache (SIC) with an associated processor directory (PD). Each PD plurality of line entries define the content corresponding positions SIC. entry data shareability control bit, designated EX, may be set to one or zero state indicate, respectively, exclusive (EX) readonly (RO) line. An not shareable, but shareable i.e. exist validly more than SIC MP. Any MP can request EX from its SIC, found another CP's If requests storage and it allowed remain other by being RO both CPU SICs for situations which: (1) unchanged (2) case received requesting even though requested state. But if changed designation will invalidated where castout.