Low power non-volatile memory and gate stack

摘要: Non-volatile memory devices and arrays are described that facilitate the use of band-gap engineered gate stacks with asymmetric tunnel barriers in reverse normal mode floating node cells NOR or NAND architectures allow for direct programming erase, while maintaining high charge blocking deep carrier trapping sites good retention. The low voltage tunneling program erase capability reduces damage to stack crystal lattice from energy carriers, reducing write fatigue enhancing device lifespan. also enables size reduction through design further feature scaling. Memory present invention multiple bit storage. These characteristics embodiments operate within definition a universal memory, capable replacing both DRAM ROM system.