ElastIC: An Adaptive Self-Healing Architecture for Unpredictable Silicon
作者： Dennis Sylvester , David Blaauw , Eric Karl
DOI: 10.1109/MDT.2006.145
关键词:
摘要: ElastIC must deal with extremes a multiple core processor subjected to huge process variations, transistor degradations at varying rates, and device failures. In this article, we present broad vision of new cohesive architecture, ElastIC, which can provide pathway successful design in unpredictable silicon. is based on aggressive run-time self-diagnosis, adaptivity, self-healing. It incorporates several novel concepts these areas brings together research efforts from the device, circuit, testing, microarchitecture domains. Architectures like will become vital extremely scaled CMOS technologies (such as 22 nm); ideally, they target applications such multimedia, Web services, transaction processing
computer.org
sci-hub.se 参考文章(21)
M. Nicolaidis, Time redundancy based soft-error tolerance to rescue nanometer technologies vlsi test symposium. pp. 86- 94 ,(1999) , 10.1109/VTEST.1999.766651
Zhijian Lu, Wei Huang, J. Lach, M. Stan, K. Skadron, Interconnect lifetime prediction under dynamic stress for reliability-aware design international conference on computer aided design. pp. 327- 334 ,(2004) , 10.1109/ICCAD.2004.1382595
Tze-Chiang Chen, Where CMOS is Going: Trendy Hype vs. Real Technology IEEE Solid-state Circuits Newsletter. ,vol. 20, pp. 5- 9 ,(2006) , 10.1109/N-SSC.2006.4785853
Vishwani D. Agrawal, Chih-Jen Lin, Paul W. Rutkowski, Shianling Wu, Yervant Zorian, Built-in self-test for digital integrated circuits AT&T technical journal. ,vol. 73, pp. 30- 39 ,(1994) , 10.1002/J.1538-7305.1994.TB00576.X
Sarvesh H Kulkarni, Dennis Sylvester, David Blaauw, A statistical framework for post-silicon tuning through body bias clustering international conference on computer aided design. pp. 39- 46 ,(2006) , 10.1145/1233501.1233511
Choong-Un Kim, S. H. Kang, J. W. Morris, Effect of current reversal on the failure mechanism of Al-Cu-Si narrow interconnects Journal of Electronic Materials. ,vol. 25, pp. 293- 296 ,(1996) , 10.1007/BF02666258
Jan M. Rabaey, Design at the end of the silicon roadmap asia and south pacific design automation conference. ,vol. 1, pp. 1- 2 ,(2005) , 10.1145/1120725.1120729
Y. Zorian, E.J. Marinissen, S. Dey, Testing embedded-core-based system chips Computer. ,vol. 32, pp. 52- 60 ,(1999) , 10.1109/2.769444
Conrad Ziesler, Krisztian Flautner, Trevor Mudge, David Blaauw, Nam Sung Kim, Sanjay Pant, Toan Pham, Shidhartha Das, Rajeev Rao, Dan Ernst, Todd Austin, Razor: a low-power pipeline based on circuit-level timing speculation international symposium on microarchitecture. pp. 7- 18 ,(2003) , 10.5555/956417.956571
J.W. Tschanz, S. Narendra, R. Nair, V. De, Effectiveness of adaptive supply voltage and body bias for reducing impact of parameter variations in low power and high performance microprocessors IEEE Journal of Solid-state Circuits. ,vol. 38, pp. 826- 829 ,(2003) , 10.1109/JSSC.2003.810053