Selectable 8/16 bit DMA channels for "ISA" bus
作者： Michael J. DeLoye , Dennis L. Moeller , Daniel P. Fuoco
DOI:
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摘要: In a personal computing system the function of DMA controllers in "AT" or "ISA" bus has been modified so that may select whether 16-bit channels are to be used as 8-bit channels. An 8/16-bit mode bit for each is written control register during Power On Self Test routine. Once three channels, it read when channel active operate an channel. With this information available, page addressing selectively changed from 128k size pages 64k converted 8-bit. addition, byte within two single mode.
lens.org 参考文章(14)
Bruce A. Fairman, William G. Swinton, Allen J. Larsen, Robert G. Taylor, Multimode expanded memory space addressing system using independently generated DMA channel selection and DMA page address signals ,(1987)
Tsuneo Kinoshita, Isamu Yamazaki, Fumitaka Sato, Information processing system including a one-chip arithmetic control unit ,(1981)
Bruce A. Fairman, William G. Swinton, Allen J. Larsen, Robert G. Taylor, Computer address modification system using writable mapping and page stores ,(1989)
Yoshikuni Sato, Toshiya Takahashi, Information transferring apparatus ,(1981)
Mark A. Stambaugh, Stephen P. Sacarisen, Michael W. Patrick, Ki S. Chang, Microprocessor with integrated CPU, RAM, timer, bus arbiter data for communication system ,(1984)
Bruce A. Fairman, William G. Swinton, Allen J. Larsen, Robert G. Taylor, Computer address modification system with optional DMA paging ,(1987)
David W. Stoenner, Sherman Lee, Timothy A. Olson, William M. Johnson, Drew J. Dutton, Direct memory access apparatus and methods for transferring data between buses having different performance characteristics ,(1987)
Manjiro Iida, Masaki Murayama, Data transfer system for a data processing system provided with direct memory access units ,(1982)
Erwin R. Berger, Howard T. Olnowich, Architecture converter for slave elements ,(1990)