Current-Comparison-Based Domino: New Low-Leakage High-Speed Domino Circuit for Wide Fan-In Gates
作者： Ali Peiravi , Mohammad Asyaei
DOI: 10.1109/TVLSI.2012.2202408
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摘要: In this paper, a new domino circuit is proposed, which has lower leakage and higher noise immunity without dramatic speed degradation for wide fan-in gates. The technique utilized in paper based on comparison of mirrored current the pull-up network with its worst case current. proposed decreases parasitic capacitance dynamic node, yielding smaller keeper gates to implement fast robust circuits. Thus, contention consequently power consumption delay are reduced. also decreased by exploiting footer transistor diode configuration, results increased immunity. Simulation designed using 16-nm high-performance predictive technology model demonstrate 51% reduction at least 2.41t noise-immunity improvement same compared standard circuits 64-bit OR
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