Preferential Dispatching Of Computer Program Instructions

作者: Timothy H. Heil , Brian L. Koehler , Eric O. Mejdrich

DOI:

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摘要: A computer processor that includes a plurality of execution pipelines, each pipeline including configuration one or more units the processor, characterized by an type, type determined according to types program instructions executed in pipeline; hardware threads execution, thread instruction types, sequences same interspersed with other types; and dispatcher capable dispatching preferentially during predefined preference period from preferred particular dependence upon whether presents sequence instructions, ready for thread, pipeline.

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