High-throughput interconnect allowing bus transactions based on partial access requests

摘要: A high throughput memory access interface is provided. The includes features which provide higher data transfer rates between system and video/graphics or audio adapters than possible using standard local bus architectures, such as PCI ISA. allows requests to be performed in a manner that only portions of an request are required transmitted the target device for certain transactions. Each command bits, address length bits. In initiating device, each separated into three segments, stored separate registers both device. Only segment contains lowest order bits by initiate transaction. Thus, if either other two segments has not changed since previous request, then target. If have they provided purposes updating state Access may optionally on port from used transmit response requests.