作者: S. Dasgupta , A. Rajashekhar , K. Majumdar , N. Agrawal , A. Razavieh
DOI: 10.1109/JXCDC.2015.2448414
关键词:
摘要: … – 30 nm on tri-gate baseline FET TCAD model [10] show nonhysteretic reduction in operating voltage. (b) Further improvement in Id is possible at the expense of ~ 150 mV hysteresis. …