作者: Si-Young Choi , Bong-Young Yoo
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摘要: Methods of forming electrical interconnects on semiconductor substrates include the steps a first electrically insulating layer (e.g., silicon dioxide) and then contact hole in to expose underlying layer. A conductive region W, Ti, Tin, Al) is formed hole. step performed remove portion define recess therein which preferably surrounds an upper region. second Al, Cu, Ta Co) recess. Here, chosen have good coverage capability fully bury very low resistance even if some degree sacrificed. Planarization (e.g, CMP, etch-back) may also be surrounding Barrier metal layers conformable deposited prior therein.