作者: Norbert Seifert
DOI: 10.1561/1000000018
关键词:
摘要: Chip-level soft-error rate (SER) estimation can come from two sources: direct experimental measurement and simulation. Because SER mitigation decisions need to be made very early in the product design cycle, long before Si is available, a simulation-based methodology of chip-level radiation-induced soft error rates that fast reasonably accurate crucial reliability success final product. The following contribution summarizes selected publications are deemed relevant by author enable truly methodology. Although strategies concepts described have microprocessors manufactured bulk CMOS technologies mind, there no fundamental reason why they cannot applied other different types integrated circuits (ICs).