Energy-Efficient FPGA-Based Parallel Quasi-Stochastic Computing

摘要: The high performance of FPGA (Field Programmable Gate Array) in image processing applications is justified by its flexible reconfigurability, inherent parallel nature and the availability a large amount internal memories. Lately, Stochastic Computing (SC) paradigm has been found to be significantly advantageous certain application domains including because lower hardware complexity power consumption. However, viability deemed limited due serial bitstream excessive run-time requirement for convergence. To address these issues, novel approach proposed this work where an energy-efficient implementation SC accomplished introducing fast-converging Quasi-Stochastic Number Generators (QSNGs) stochastic processing, which are well suited leverage FPGA’s reconfigurability abundant memory resources. tested on Virtex-4 FPGA, results have compared with implementations conventional computation using well-known edge detection multiplication circuits. Results prove that approach, execution time, as consumption decreased factor 3.5 4.5 circuit circuit, respectively.