Caching in a multi-processor computer system
作者： Wingyu Leung , Kit Sang Tam
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摘要: A structure and method of implementing a cache memory for multi-processor system. The includes main which is coupled to bus. plurality processors can also be the RAM circuit module banks. sense amplifiers predetermined number banks are used as (i.e., amplifier lines). with activated substantially less than total not kept in precharged state.
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