Structure for interconnect structure containing various capping materials for electrical fuse and other related applications
作者： William R. Tonti , Louis L. Hsu , Chih-Chao Yang
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摘要: A design structure is provided for interconnect structures containing various capping materials electrical fuses and other related applications. The includes a first having interfacial second adjacent to the structure. has different from
google.com.ar 参考文章(52)
Minh Van Ngo, Method for forming nitride capped Cu lines with reduced hillock formation ,(2002)
Ja-Young Choi, Interconnections of semiconductor device and method of forming the same ,(2005)
Minh Van Ngo, Robin W. Cheung, High density capping layers with improved adhesion to copper interconnects ,(1998)
Chih-Chao Yang, Lawrence A. Clevenger, Louis C. Hsu, Timothy J. Dalton, Nicholas C. Fuller, Adopting feature of buried electrically conductive layer in dielectrics for electrical anti-fuse application ,(2005)
Ki-Young Lee, Seung-Han Park, Semiconductor device having fuse and capacitor at the same level and method of fabricating the same ,(2004)
Wai-kin Li, Ping-Chuan Wang, Empty vias for electromigration during electronic-fuse re-programming ,(2007)
Chih-Chao Yang, Louis C. Hsu, Rajiv V. Joshi, Simultaneous grain modulation for BEOL applications ,(2008)
Takeshi Harada, Semiconductor device having via connecting between interconnects ,(2004)
Grant Kloster, Patrick Morrow, Jihperng Leu, Andrew Ott, Lawrence D. Wong, Method of making semiconductor device using a novel interconnect cladding layer ,(2002)