作者: Jiyong Woo , Jeonghwan Song , Kibong Moon , Ji Hyun Lee , Euijun Cha
DOI: 10.1109/VLSIT.2014.6894431
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摘要: We demonstrate a selector device with excellent performances (J MAX > 10 7 A/cm 2 , switching speed <; 20ns) at the 30nm cell size. Furthermore, these promising characteristics were achieved in fully CMOS compatible stack (W/Ta 2 O 5 /TaO x /TiO 2 /TiN) extremely thin oxide layer (<; 10nm). Through comprehensive understanding on exponential I-V curve, effect of intrinsic/extrinsic factors such as scaling (area and thickness), parasitic components systemically investigated.