Computer system for concurrent data transferring between graphic controller and unified system memory and between CPU and expansion bus device

摘要: A computer system is provided including a CPU, graphics controller, memory, data steering logic, DMA controller and arbitration logic. The memory are coupled to high-speed bus. Data accessed by the all stored in memory. logic also bus low-speed bus, CPU. configured selectively couple CPU either or thereby accommodating transfers between device connected slow-speed concurrent with may accommodate on transfers. arbitrates for access controller. In an alternative mode, accommodates over both buses as single double width high speed described above be included within integrated circuit along various PC compatibility cores, thus achieving low-cost, low-space without sacrificing overall performance.