Modeling the trapping and de-trapping of phosphorus at the Si to SiO2 interface
作者： H.-H. Vuong , C. S. Rafferty , J. Ning , J. R. McMacken , J. McKinley
DOI: 10.1007/978-3-7091-6827-1_94
关键词:
摘要: The phosphorus dose loss by trapping at the Si-SiO2 interface was studied for various process modules of a 0.3 µm CMOS technology, both separately and in combination. SIMS measurements showed significant loss, up to 30%, also sizable de-trapping after 1000°C anneal. observed as an additional peak silicon surface. A new model which includes fluxes incorporated into simulator PROPHET. Subsequently, simulations were able reproduce data well NMOS threshold voltage values. that is enhanced TED, thereby explaining measured dependence on implanted dose, fact major occurred during first anneal implantation.
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