Programmable video signal processor for video compression and decompression

作者: Danian Gong

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摘要: A data processing method with multiple issue datapath architecture in a video signal processor (VSP) is provided. In the method, commands are received from external processor. The routed to plurality of separate command sequencers, an Input/output (10) or configure registers according different types. Each sequencers packs into instruction packets and sending dispatch units, which each includes one more instructions. dispatched respective function units for performing operations response packets.

参考文章(14)
Peter B. Gillingham, Paul W. DeMone, Variable length pipeline with parallel functional units ,(1999)
J. A. Kahle, M. N. Day, H. P. Hofstee, C. R. Johns, T. R. Maeurer, D. Shippy, Introduction to the cell multiprocessor Ibm Journal of Research and Development. ,vol. 49, pp. 589- 604 ,(2005) , 10.1147/RD.494.0589
T. Chen, R. Raghavan, J. N. Dale, E. Iwata, Cell broadband engine architecture and its first implementation: a performance view Ibm Journal of Research and Development. ,vol. 51, pp. 559- 572 ,(2007) , 10.1147/RD.515.0559
Stuart Hawkinson, Brent LeBack, Ron Coleman, Richard Rubinstein, Tightly coupled and scalable memory and execution unit architecture ,(2004)