作者: Avinash Karanth Kodi , Ahmed Louri
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摘要: The relentless quest for processing speeds in the range of Teraflops and beyond has accelerated need scalable, parallel, High-Performance Computing (HPC) systems. For these systems to be scalable attain desirable performance, interconnection network connecting processors, must itself both size bandwidth. However, at higher bit rates longer communication distances, fundamental electrical signaling limitations reduce inter-processor bandwidth while increasing power dissipation, thereby affecting not only performance HPC systems, but also their scalability. In this dissertation, we propose an optical interconnect based architecture called RAPID (Reconfigurable All Photonic Interconnect Distributed parallel systems) that maximizes density, optimizes consumption enhances scalability using static wavelength allocation. We present two cost-effective design alternatives architecture, a modified version M-RAPID extended E-RAPID minimizes cost on number transmitters required. In addition, detailed implementation integration methodology current complimentary-metal-oxide-semiconductor (CMOS) technology. order develop flexible provide dynamic system reconfiguration further reduces bottlenecks achieves better resource utilization. Reconfigurability is realized by monitoring traffic intensities, implementing re-allocation (DBR) techniques adapt changes patterns. A DBR technique - LockStep (LS) balances load each channel past utilization presented. While computer-aided (CAD) tools have significantly assisted electronic simulation, field level opto-electronics modeling lagged behind due lack simulation methodologies tools. space developing OPTISIM, interconnects Using performed architectures compared it; several synthetic Simulation results indicate reconfigured shows 35% increased throughput 20% reduced latency as networks. system-level RSIM Splash-2 suite benchmarks. showed outperformed mesh 40% terms execution time various applications.