Computer system including an apparatus for reducing power consumption in an on-chip tag static RAM

作者: Robert F. Kubick , Brian K. Langendorf , Jennefer S. Hardin

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摘要: A computer system includes an apparatus for conserving power in a tag static random access memory (SRAM). The circuitry placing the tags of SRAM reduced consumption state. also to up out state while maintaining integrity data stored tags. bus, processor, cache and controller. controller is comprised (SRAM) which sense amplifier control logic activating response address strobe signal (ADS#) from processor initiating SRAM. further keeping activated during cycle deactivating SRAM, including circuitry, upon completion thereby

参考文章(3)
David G. L. Chow, Jack M. S. Liu, Reducing power consumption in on-chip memory devices ,(1988)
Hidechica Kishigami, Kiyotaka Sasai, Tohru Sasaki, Microprocessor with on-chip cache memory with lower power consumption ,(1988)