Memory effects of silicon‐implanted oxides for electrically erasable programmable read‐only memory applications

摘要: The memory effects of silicon‐implanted oxides are reported in this letter. Due to the trap‐like characteristics implanted silicon, hysteresis capacitance‐voltage loops have been measured after voltage pulse stressing. A positive leads a shift curve, while negative stress results drift. It was found that using these Si‐implanted oxides, writing/erasing operations electrically erasable programmable read‐only memories could be realized by applying short pulses (e.g., 100 ns, ±12–16 V). Moreover, excellent retention were also detected for devices. silicon alters conduction mechanism such I‐V behavior does not follow Fowler–Nordheim tunneling. implantation process did yield noticeable degradation oxide quality; and lifetime over 10 yr can achieved even with ±16 V