DESIGN-FOR-TESTABILITY AND DIAGNOSIS METHODS TO TARGET UNMODELED DEFECTS IN INTEGRATED CIRCUITS AND MULTI-CHIP BOARDS

Kenneth R. Bowden, Jeremy Richman, The Modern Fault Dictionary. international test conference. pp. 696- 702 ,(1985)

Roger K. Blashfield, Mark S. Aldenderfer, Cluster Analysis. Sage University Paper Series On Quantitative Applications in the Social Sciences 07-044 Sage Publications. ,(1984)

Zainalabedin Navabi, VHDL: Analysis and Modeling of Digital Systems ,(1992)

Miron Abramovici, Melvin A. Breuer, Arthur D. Friedman, Digital Systems Testing and Testable Design ,(1990)

G. Jervan, Z. Peng, O. Goloubeva, M.S. Reorda, M. Violante, High-level and hierarchical test sequence generation high level design validation and test. pp. 169- 174 ,(2002) , 10.1109/HLDVT.2002.1224448

Manoj Sachdev, Defect Oriented Testing for CMOS Analog and Digital Circuits ,(1997)

M. Bushnell, Vishwani Agrawal, Essentials of Electronic Testing for Digital, Memory and Mixed-Signal VLSI Circuits ,(2013)

B. Benware, C. Schuermyer, N. Tamarapalli, Kun-Han Tsai, S. Ranganathan, R. Madge, J. Rajski, P. Krishnamurthy, Impact of multiple-detect test patterns on product quality international test conference. ,vol. 1, pp. 1031- 1040 ,(2003) , 10.1109/TEST.2003.1271091

Zhiyuan Wang, Zhanglei Wang, Hongxia Fang, Xinli Gu, System and method for executing functional scanning in an integrated circuit environment ,(2010)

Weiwei Mao, R.K. Gulati, Improving gate level fault coverage by RTL fault grading international test conference. pp. 150- 159 ,(1996) , 10.1109/TEST.1996.556957