作者: Junichi Miyamoto , Koji Sakui
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摘要: A memory cell array has a unit formed from one and two select transistors sandwiching the cell. One block control gate line. Memory cells connected to line form page. sense amplifier having latch function is bit In data change operation, of page are read amplifiers. After superscribed on in amplifiers, erase performed, amplifiers programmed Superscription allows operation for byte or data.