Low power showdown: comparison of five DSP platforms implementing an LPC speech codec
作者： D. Hwang , C. Mittelsteadt , I. Verbauwhede
DOI: 10.1109/ICASSP.2001.941119
关键词:
摘要: An identical LPC speech coder has been implemented on a set of signal processing specific implementation platforms. The main goal this experiment was to compare energy consumption. In addition, area/memory requirements and design time are also compared. first designed in floating-point C. Then, the fixed-point wordlengths were determined. Depending platform, either compiled code generated, assembly written or Verilog/VHDL created. platforms reported paper include DSP processors TI C55/spl times/, C54/spl C6/spl times/ environments Ocapi A|RT Designer. Energy consumption ranged from 2 /spl mu/J 288 per frame. Upon scaling results same technology, our indicated that lowest power processor (TI times/) still consumes factor four more than an application processor.
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