Software queue-based algorithms for pipelined synchronization on multiprocessors

摘要: Synchronization either ensures mutual exclusion on shared data or forces a processor to wait until set of variables becomes specific state; the latter is called conditional synchronization. We have improved performance multiprocessors by allowing processors concurrently access different parts in pipelined manner (Takesue, 2002). A special software tree queue-tail pointers key scheme for pipelining, but it requires other hardware schemes such as queue distributed caches. This paper proposes queue-based algorithms synchronization only with Fetch&Inc. support. pipeline exploiting tree. Conditional declaring semaphore structure, and simulating P V operations so that can be eagerly performed before accessing data. Evaluation results an RTL (register transfer level) simulator show compared non-pipelined synchronization, speedup our pipelining reaches up over 2.0 large heavily contentious cases.